CC: Tweaked

CC: Tweaked

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Co-processor for handling data persistence

powerboat9 opened this issue ยท 1 comments

commented

Inspired by #535 (comment), what if computers had a RISC co-processor running something vaguely similar to eBPF? Co-processors could have limited memory (2kb max?) and run only after receiving co-processor-specific events as configured by their associated computer. In order to prevent Turing completeness jump instructions would only be allowed to jump forward in the address space. Since programs would be small, fast, and always halt, they wouldn't have to be preemptable. The co-processor event queue, memory, and interrupt settings could be saved to the computer's nbt, making co-processors persistent.

The following are some WIP implementation suggestions

Configuration (additional abstraction layers could be written in Lua):

API function description
setBuiltinInterrupt(name, idx) sets the co-processor to begin executing at address idx once built-in event name is received, errors if interrupts are enabled
clearBuiltinInterrupts() clears co-processor builtin-in interrupt configuration, errors if interrupts are enabled
enableInterrupts() enables interrupts on the co-processor
disableInterrupts() prevents any more events from being added to the event queue and blocks until all events on the event queue are processed
writeDataHex(address, val) writes a hexadecimal string to memory
writeDataByte(address, val) writes a 32 bit integer to memory
readDataHex(address, length) reads a hexadecimal string of length length from memory
readDataByte(address) reads a 32 bit integer from memory
trap(address) queues an interrupt which causes execution at address, errors if interrupts aren't enabled

Some ideas for built-in events:

Event description
move turtle has completed a forward movement
move_up upward movement
move_down downward movement
turn_left completed left turn
turn_right completed right turn
place completed forward place
place_up completed upward place
place_down completed downward place

Some ideas for architecture:

32 bit registers: acc, a, b
program counter: ip

operation description
movea a := acc
moveb b := acc
load_imm acc := CONSTANT
load acc := mem[a]
store mem[a] = acc
swap a, b := b, a
band acc := acc & a
bor acc := acc | a
bnot acc := ~acc
bshl acc := acc << a
bshr acc := acc >> a
bshrs acc := acc >>> a
add acc := acc + a
sub acc := acc - a
mul acc := acc * a
div acc := acc / a
jmp ip := ip + CONSTANT
jmpz if a = 0 then ip := ip + CONSTANT
halt halts processor, ends processing of current event
commented

This is a neat idea, but I don't think it really fits into CC itself. Could definitely be implemented as a peripheral mod, if people wanted to!