Earlier today, I was attempting to make the smallest bus selector I could. I settled with this (https://gyazo.com/70f5bb9b292af37874799db29bbdc715) as it technically fits in one block. It would be nice if instead there was an option to use two Bus Transceivers, which would allow for the same effect.

A second type of Bundled I/O that used the entire connected cable, rather than it's individual cables, would neaten up ICs that need to use the entire bundled cable anyways.

While placing the Null Cells for the above blueprint, it would have been nice to be able to highlight-and-place in the same way you can with the delete tool. If the other Array Cells are implemented in the future, this would make Array placement much faster. If I'm doing something like a decoder, I will normally place the Invert Cells first and fill the Buffer Cells in after. If an area could be filled with Array tiles in two mouse movements, doing this on an IC would take far less time.

+1, ability to have Input and Output bundled cables on a single side would also be nice.

Ok so there will definitely be an IO gate that allows you to use the entire bundled cable instead of each color. However, I'm still working on some tweaks to allow actual bus gates inside ICs. If you noticed, none of the gate tiles have bundled IO, and there is a reason for this. As soon as this is possible, the 16-bit bundled IO gate will be added as well.

All gates currently can be dragged upon placement to orient them. However, for some of the cell gates it makes no sense because they work the same regardless of orientation. I'll see what I can do for this.

Unfortunately, sides on the actual gate are reserved for either Input or Output. Although its mostly a limitation of how signals propagate (as well as to avoid signal feedbacks), it also keeps things much simpler. I believe me and CB discussed this some time ago.

This is being discussed here: #1616