I started looking into it because of Victorious3/Integrated-Circuits#135.
Then I found out that P:R already has its own ICs and that they are affected too.

Problem

For some gates, when input goes low and then goes back high even within the same tick, gate action triggers the same as if input was low for a few ticks.

For example, Toggle Latch will toggle if its input is turned off and then back on in the same tick.

List of affected gates I found: Toggle latch, Pulse former, Counter, Synchronizer and Repeater (btw: vanilla repeater is fine).

Gates inside ICs are affected too, although I guess they are implemented differently. (Well, at least Toggle Latch is affected.)

ICs have no output delay.
In some cases, it causes 0-tick signal pulses or makes ICs power themselves "for no apparent reason".

How to reproduce

Create an empty IC, place "simple IO" on opposite sides, switch them to "inout" mode and connect with wire. Done!

Now place these in straight line: lever (A), wire, IC, IC, ..., IC, lever (B).
Then place a toggle latch on one side of that wire, and a NOT gate with toggle latch on another.

Turn lever A on. Turn lever B on. After that turn lever A off.
Wire will visually remain on (or flicker briefly), but toggle latch that is directly connected to it will toggle. However, toggle latch connected through a NOT gate will not toggle, no matter how many ICs you use (you can even connect them with wires).

That is, it is actually a 0-tick pulse, and it triggers Toggle latch.

Also, that IC will sometimes power itself whei its IOs are shorted.

Okay. Then another question:
Is there any way for other mod to implement a gate that works like P:R wire or like a cell?

Because the reason why I found this bug is that I worked on IntegratedCircuits mod and came to conclusion that 2 or more IO pins connected with wire inside IC cannot work "properly" without at least one of these:

• Either wire system should ignore 0-tick pulses (but still propagate them),
• Or it should allow to ask "Are there any other power sources on that wire?" so that I don't have to produce that 0-tick pulse in the first place.

Both vanilla redstone and RedLogic propagate 0-tick pulses and ignore them. I did not check MFR. Edit: MFR is fine too.

I could not find any way to make the above "test design" work properly with P:R and IntegratedCircuits mod.

It is possible, the API supports it, however PR ICs will always have a 2 tick delay on the output, there will be no instant wire/cell equivalent using ICs

It is possible, the API supports it

Please forgive me for asking it there (as it is a bit off-topic), but how? I looked at API quite a few times already and I only see how to set output and read input. Nothing about wire-like behavior.
If 0-tick pulses are ignored by gates but propagated anyway, the simplest solution is to turn output off and check if input is still on, as it is basically what I want to know, and then turn output back on if required.
However, P:R does not ignore them in some cases.

Quite likely I am missing something.

Take a look at cell implementation
The tricky thing is any instant or 2 way wire connection needs to have a signal strength to prevent self powering

This is an intentional mechanic. The ICs outputting zero length pulses is not, and will be fixed with the IC rewrite.

The gates you have mentioned (along with the RS latch) are specifically designed to respond to instant input, though they only update their outputs once every 2 ticks.

Thanks! I was tinkering with it for a while already, an did not even try to short IOs both on inside and outside of IC. It does indeed create self-powering loops. So for now I will have to go with delay on outputs.

One last question: are any classes outside api directory meant for external use? Or may they break things without notice?

Yeah, the logic and wiring except for ICs are quite stable, so they're extensible and usable

Yes, I wouldn't touch the IC code, but the rest of it is fine.